Modern electronic devices may include a number of functional modules, each of which performs the same or a different function. Often, these modules need to communicate with one another. Communications busses are widely used for accomplishing this task. Various standard communications busses currently exist, including inter-integrated circuit (I2C), RS-232, UNI/O, and the like. Recently, single wire communications busses have become popularized due to the convenience afforded by reducing routing requirements and possible interference between communication lines.
FIG. 1 illustrates a conventional single wire communications system 10. The conventional single wire communications system 10 includes a first single wire communications bus 12A and a second single wire communications bus 12B. A master controller 14 is coupled to each one of the first single wire communications bus 12A and the second single wire communications bus 12B. A number of slave devices 16 are each coupled to one of the first single wire communications bus 12A and the second single wire communications bus 12B.
The master controller 14 includes communications circuitry 18, a first-in-first-out (FIFO) buffer 20, a digitally controlled oscillator 22, power management circuitry 24, and secondary communications circuitry 26. The communications circuitry 18 is configured to interface with the first single wire communications bus 12A and the second single wire communications bus 12B in order to facilitate communication with the slave devices 16. The FIFO buffer 20 is used to store and access data required for communication on the first single wire communications bus 12A and the second single wire communications bus 12B. The digitally controlled oscillator 22 is used to generate signals for communication on the first single wire communications bus 12A and the second single wire communications bus 12B. The power management circuitry 24 is responsible for meeting the required power needs of the other circuitry in the master controller 14. The secondary communications circuitry 26 is configured to communicate with one or more other devices on a different type of communication bus, thereby enabling the slave devices 16 to communicate with devices that are not on the first single wire communications bus 12A and the second single wire communications bus 12B.
Each one of the slave devices 16 includes power management circuitry 28, communications circuitry 30, functional circuitry 32, a first pin 34A, and a second pin 34B. The power management circuitry 28 is responsible for meeting the required power needs of the other circuitry in the slave device 16. The communications circuitry 30 is configured to facilitate communications on the single wire communications bus 12. The functional circuitry 32 is configured to perform some function, which may be regulated or otherwise controlled by communication over the single wire communications bus 12. The first pin 34A is used to connect the slave device 16 to the single wire communications bus 12. The second pin 34B is used to connect the slave device 16 to ground via a power management capacitor CPM.
Each one of the slave devices 16 must be uniquely identified on the single wire communications bus 12 to which they are attached. Conventionally, this has been done by a hard-coded unique slave identifier (USID) which is set for the slave device during manufacturing. So long as each one of the slave devices has a different USID, the master controller 14 can uniquely address each one of the slave devices and thus properly communicate therewith. The USID may be limited in size (e.g., 4 bits), thereby setting an upper limit to the number of slave devices 16 that can be present on a single wire communications bus while remaining uniquely identifiable (e.g., 24 or 16 total devices or 1 master device and 15 slave devices for a 4 bit USID). Accordingly, multiple single wire communications busses may be provided as in the first single wire communications bus 12A and the second single wire communications bus 12B to accommodate a desired number of slave devices 16.
Slave devices 16 that are otherwise identical (e.g., by providing the same functional circuitry 32) must be provided as different physical parts to achieve the different USIDs. Accordingly, if eight slave devices 16 are needed in a system, eight different slave device 16 parts are needed. These eight different slave device 16 parts must be separately manufactured, inventoried, and installed, which is undesirable from both a supplier and a customer standpoint.
FIG. 2 is a waveform illustrating an exemplary communication sequence on the first single wire communications bus 12A and the second single wire communications bus 12B. The waveform begins with a start of sequence, followed by a command frame including a USID, a command, an address, and a command frame check sequence, followed by a data frame including data and a data frame check sequence, followed by a bus park, followed by an acknowledgement, followed by a fast charge. The start of sequence indicates the beginning of a message on the single wire communications bus. The command frame indicates the function of the message, where the USID indicates the slave device 16 for which the message is intended, the command indicates what the slave device 16 should do in response to the message (i.e., read data from memory, write data to memory), the address indicates a register address that is acted upon in a slave device 16 by the message, and the command frame check sequence is used to verify the contents of the command frame. The data frame provides the actual data for the message, which is acted on according to the command provided in the command frame, while the data frame check sequence is used to verify the contents of the command frame. The remaining portions of the waveform signify the end of the message.
Messages from the master controller 14 are broadcast over one or more of the single wire communications busses 12 as shown and received by all of the slave devices 16 connected thereto. However, only the slave device 16 associated with a USID that matches the one in the message responds thereto. The USID is only four bits long. This means that only fifteen different slave devices 16 may be included on a single wire communications bus 12 if they are uniquely identified by USID alone. To increase the number of slave devices 16 that may be included on a single wire communications bus 12, different part numbers may be used along with the USID to uniquely identify different slave devices 16. Further, a number of registers in memory of each one of the slave devices 16 may be reserved for further identification of slave devices 16 on the first single wire communications bus 12A and the second single wire communications bus 12B as discussed in co-pending U.S. patent application Ser. No. 15/467,790, the contents of which are hereby incorporated by reference in their entirety.
To illustrate, FIG. 3 is a chart showing register maps for the slave devices 16. A first subset of registers 36 in each one of the slave devices 16 is reserved for device identification, while a second subset of registers 38 are shared registers. Each one of the slave devices 16 is associated with a different one (or, while not shown, multiple ones) of the first subset of registers 36, which is illustrated by the shaded one of the first subset of registers 36. This means that the slave device 16 will only respond to messages on the single wire communications bus 12 that access (e.g., read from or write to) this register address by including it in the address field of the command frame. Since each one of the slave devices 16 is associated with only one of the first subset of registers 36, this provides an additional way to uniquely identify and thus communicate with the slave device 16 without changing a USID thereof. That is, all of the slave devices 16 may have the same USID but respond to a different one of the first set of registers 36. The number of registers in the first subset of registers 36 determines the total number of uniquely addressable slave devices 16 on a single wire communications bus 12 (multiplied by the number of different USIDs). The second subset of registers 38 may be shared across the slave devices 16 meaning that the contents of these registers may be synchronized across the slave devices 16. These shared registers may include calibration data, trigger data, product IDs, user IDs, and the like.
FIG. 4 is a chart showing alternative register maps for the slave devices 16. The register maps are similar those shown above in FIG. 3, except that each slave device 16 is associated with two different ones (or, while not shown, multiple ones) of the first subset of registers 36 as indicated by the shading provided therein. In this case, each one of the slave devices 16 may respond to two USIDs, and may use the first one of the first subset of registers 36 when addressed using the first USID and the second one of the first subset of registers 36 when addressed using the second USID. That is, if a slave device 16 is addressed using a first USID it may respond only to those messages that access the first register address, while if the slave device 16 is addressed using the second USID it may respond only to those messages that access the second register address. Using the register maps in FIG. 4 effectively doubles the number of times the same slave device 16 part can be used on the single wire communications bus 12. In the single wire communications system 10, the same slave device 16 part may be used for two of the slave devices 16 by simply addressing the slave devices 16 connected to the first single wire communications bus 12A using a first USID and addressing the slave devices 16 connected to the second single wire communications bus 12B using a second USID.
In essence, FIGS. 3 and 4 illustrate using a number of registers in a slave device 16 as a sub-address to the USID, thereby expanding the length of the unique identifier for each slave device. By using registers in each one of the slave devices 16 to uniquely identify the slave devices 16 on the single wire communications bus 12, the number of slave devices 16 that may be included on the single wire communications bus 12 may drastically increase. The cost in usable register space in each one of the slave devices 16 is generally negligible.
Similar to the USID, determining which one of the registers in the first subset of registers 36 a slave device 16 is associated with is hard-coded during manufacturing. As discussed above, this results in a large number of different products that perform the same task, leading to manufacturing and inventory issues. Accordingly, there is a need for slave devices and single wire communications systems that offer reconfigurable unique addressing without requiring separate manufacturing and/or product lines.